//DDR config start
//cxk
#include "ddr_param_define.h"
#include "ddr_config_define.h"
#define DISABLE_DIMM_ECC
//#define FIX_DDR_PARAM
#define PRINT_MSG
//#define DEBUG_DDR
//#define DEBUG_DDR_PARAM

        dli     msize, 0

        TTYDBG("NODE 0 MEMORY CONFIG BEGIN\r\n")
//!!!!important--s1 must be correctly set
#ifdef  AUTO_DDR_CONFIG
        dli     s1, 0x32100000  //set use MC1 or MC0 or MC1/0 and give All device id
#else
        dli     s1, 0xc1e10200c1e10204  //set use MC1 or MC0 or MC1/0 and give All DIMM infor // danmian
        dli     s1, 0xc1e30400c1e30404  //set use MC1 or MC0 or MC1/0 and give All DIMM infor // shuagnmian
        dli     s1, 0xc1ec0400c1ec0404  //set use MC1 or MC0 or MC1/0 and give All DIMM infor // shuagnmian
#endif
#include "loongson3_ddr2_config.S"

#ifdef MULTI_CHIP
		TTYDBG("NODE 1 MEMORY CONFIG BEGIN\r\n")
#ifdef  AUTO_DDR_CONFIG
        dli     s1, 0x76540001  //set use MC1 or MC0 or MC1/0 and give All device id
#else
        dli     s1, 0xc1e10200c1e10201  //set use MC1 or MC0 or MC1/0 and give All DIMM infor
#endif
#include "loongson3_ddr2_config.S"
#endif

#ifdef ARB_LEVEL
        b       ARB_level_over
        nop
#include "ARB_level.S"
ARB_level_over:
#endif
